We’ve only just started to see PCIE 4.0 on AMD X570 motherboards … and now the consortium is finalizing PCIE 6.0. What happened to PCIE 5.0?
With 64 Gbps bandwidth per lane, 256 Gbps in x4, and a whopping 1 Tbps in x16 (128 GB/s per direction), PCI-Express 6.0 will debut in 2021 as 5G adoption hits critical mass in markets across the globe, to support server nodes, high-bandwidth network infrastructure, and lighting fast I/O for HPC and AI applications. Development of the new standard is already underway, with the specification having achieved a pre-release version 0.3, according to the PCI-SIG, the body that develops and maintains the PCI IP.
Further development, prototyping, and testing of the standard will run through 2020 as drafts of the standard are dispatched to interested parties. With the specification published in 2021, the first devices implementing it could arrive the following year. Granted, very few devices need 1 Tbps bandwidth, but the exercise of doubling bandwidth every 3 or so years has its maximum impact on devices that only have wiring for one PCIe lane, and directly impacts bandwidth of other I/O specifications that are derived from PCIe, such as USB, Thunderbolt, CXL, etc.
Source: TPU
