Ventana Micro Systems Inc. today announced the second generation of its Veyron family of RISC-V processors. The new Veyron V2 is the highest performance RISC-V processor available today and is offered in the form of chiplets and IP. Ventana Founder and CEO Balaji Baktha will share the details of Veyron V2 today during his keynote speech at the RISC-V Summit North America 2023 in Santa Clara, California.
“Veyron V2 represents a leap forward in our quest to lead the industry in high-performance RISC-V CPUs that are ready for rapid customer adoption,” said Balaji Baktha, Founder and CEO of Ventana. “It substantiates our commitment to customer innovation, workload acceleration, and overall optimization to achieve best in class performance per Watt per dollar. V2 enhancements unleash innovation across data center, automotive, 5G, AI, and client applications.”
Key V2 enhancements include:
Significant Increase in Performance and Efficiency
Veyron V2 showcases up to 40% improvement in performance. This gain has been made possible through significant microarchitecture enhancements, superior high performance processor fabric architecture, enhanced cache hierarchy, and the addition of a high performance vector processor.
Ecosystem: The Rise of RISE
Improved ecosystem support with the RISE ecosystem initiative enables V2 to quickly deploy open, scalable, and versatile solutions.
Lower Development Costs and Time to Market
The Veyron V2 chiplet features industry leading UCIe chiplet interconnect. Just like its predecessor, Veyron V2’s chiplet-based solutions provide advantages in unit economics, accelerating time to market by up to two years and reducing development costs by up to 75%. Chiplet based solutions also provide better unit economics by right sizing compute, IO, and memory. Composable architectures leveraging chiplets allow companies to focus on their innovation and differentiation to achieve workload optimization.
Domain Specific Acceleration
Ventana’s Domain Specific Accelerator technology, tightly coupled with the Veyron V2 processor pipeline, is designed to enhance workload efficiency across the entire data center infrastructure while enabling customer innovation and differentiation.
“In the dynamically shifting landscape of the tech industry, one truth remains constant: performance per watt per socket per dollar drives innovation across the industry,” said Patrick Moorhead, Founder and Chief Analyst at Moor Insights & Strategy. “Ultimately, that equation needs to make its way to the rack. Ventana’s latest V2 offering announcement not only aligns with this principle but could set a new benchmark for high-performance computing.”
Ventana provides a Software Development Kit (SDK) which includes a comprehensive set of software building blocks already proven on Ventana’s RISC-V platform.
Veyron V2 Features
- Fifteen wide, aggressive out-of-order pipeline
- 3.6 GHz
- 4 nm process technology
- 32 cores per cluster
- High core count multi-cluster scalability up to 192 cores
- 128 MB of shared L3 cache per cluster
- 512b vector unit
- Ventana AI matrix extensions
- Provided with server-class IOMMU and Advanced Interrupt Architecture (AIA) system IP
- Advanced side channel attack mitigations
- Comprehensive RAS features
- Top-down performance tuning methodology
- SDK released with necessary software already ported to Veyron
- Veyron V2 Development Platform available
Ventana will be highlighting its products at its booth in the RISC-V Summit main exhibit hall. Additionally, a detailed technical presentation of Veyron V2 will be offered by Greg Favor, co-founder, CTO and Chief Architect at Ventana.
