JEDEC Solid State Technology Association, the global leader in the development of standards for the microelectronics industry, today announced the publication of Universal Flash Storage (UFS) version 3.1, JESD220E. In addition, an optional new companion standard, JESD220-3: UFS Host Performance Booster (HPB) Extension, has also been published. Developed for mobile applications and computing systems requiring high performance with low power consumption, UFS 3.1 introduces new features intended to help maximize device performance while minimizing power usage. Both JESD220E and JESD220-3 are available for download from the JEDEC website.
JESD220E UFS 3.1 defines the following key updates over the prior version of the standard:
- Write Booster: a SLC non-volatile cache that amplifies write speed
- DeepSleep: a new UFS device low power state targeting lower cost systems that share UFS voltage regulators with other functions
- Performance Throttling Notification: allows the UFS device to notify the host when storage performance is throttled due to high temperature
JESD220-3 Host Performance Booster (HPB) Extension provides an option to cache the UFS device logical-to-physical address map in the system’s DRAM. For UFS devices with a large density, using system DRAM provides larger and faster caching thereby improving the read performance of the device.
“The development of UFS 3.1 is a prime example of the ongoing commitment within JEDEC to continually improve and enhance JEDEC standards to meet the needs of the industry and, ultimately, the consumer,” said Mian Quddus, Chairman of the JEDEC Board of Directors and the JC-64 Committee for Embedded Memory Storage and Removable Memory Cards. He added, “The new features introduced with UFS 3.1 and UFS HPB will offer product designers greater flexibility in managing power consumption and enhancing device performance.”