AMD Zen 2 “Rome” MCM Pictured Up Close

Right now you can get 32 Cores, 64 threads … but hopefully, we could possibly get 64 cores, 128 threads in the future!

Here is the clearest picture of AMD “Rome,” codename for the company’s next-generation EPYC socket SP3r2 processor, which is a multi-chip module of 9 chiplets (up from four). While first-generation EPYC MCMs (and Ryzen Threadripper) were essentially “4P-on-a-stick,” the new “Rome” MCM takes the concept further, by introducing a new centralized uncore component called the I/O die. Up to eight 7 nm “Zen 2” CPU dies surround this large 14 nm die, and connect to it via substrate, using InfinityFabric, without needing a silicon interposer. Each CPU chiplet features 8 cores, and hence we have 64 cores in total.

The CPU dies themselves are significantly smaller than current-generation “Zeppelin” dies, although looking at their size, we’re not sure if they’re packing disabled integrated memory controllers or PCIe roots anymore. While the transition to 7 nm can be expected to significantly reduce die size, groups of two dies appear to be making up the die-area of a single “Zeppelin.” It’s possible that the CPU chiplets in “Rome” physically lack an integrated northbridge and southbridge, and only feature a broad InfinityFabric interface. The I/O die handles memory, PCIe, and southbridge functions, featuring an 8-channel DDR4 memory interface that’s as monolithic as Intel’s implementations, a PCI-Express gen 4.0 root-complex, and other I/O.

Source: Tom’s Hardware via TPU

 

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Winston has over 20 years of experience in the I.T. Industry. He launched Funky Kit with the aim to capture a wider audience worldwide. His knowledge in PC hardware is very distinguished, not only publishing enjoyable reviews but also writing great articles.